1. Field of the Invention
The present invention relates to a solidstate imaging device and, in particular, to a CCD imaging device.
2. Background Art
On the CCD area sensor, many types are well known. The CCD area sensor of which a vertical CCD combines a picture cell column, is called the frame transfer CCD area sensor, (the frame transfer sensor for short). The frame transfer sensor having a buffer CCD between the vertical CCDs and a horizontal CCD is called the buffer frame transfer sensor. And, the buffer CCD accumulates signal charge packets of one TV field. The frame transfer sensor without said buffer CCD is called the full frame frame transfer sensor. The CCD area sensor having separately the vertical CCD and the picture cell column is called the interline CCD sensor, (the interline transfer sensor for short). The interline transfer sensor of which the transfer electrode between the picture cell and the vertical CCD is connected to the transfer electrode of the vertical CCD is called the common electrode interline transfer sensor. Said transfer electrode between the picture cell and the vertical CCD is named the address transfer electrode for short. The transfer electrode of the vertical CCD is named the vertical transfer electrode. Generally, a CCD is driven by 1 or 2 or 3 or more-phase voltage. In order to reduce the smear noise being the important problem of the CCD area sensor, Japanese Patent Application No. 56-35067 discloses subtracting one row of the smear noises memorized previously, from one row of the signals generated later.
Japanese patent application Nos. 58/41211, 62547, 76477, 86416, 91967, 207881, 232134, 240644, 249754, 59/15950, 34839, 49684, 69835, 91947, 95314, 101456, 189970 211797 are prior applications op the present invention.
Japanese patent application No. 59-66277 describing the two-electrode/bit sensor of the clocked line type is the prior application relating to the present invention.